1. Technical Field
The present invention relates to an organic light emitting diode (OELD) display device, and more particularly, to an OLED display device including an oxide semiconductor layer.
2. Related Art
An OLED display device of new flat panel display devices has high brightness and low driving voltage. The OLED display device is a self-emitting type and has excellent characteristics of, for example, a view angle, a contrast ratio, a response time.
In addition, there is a big advantage in a production cost. A fabricating process of the OLED display device is very simple and requires a deposition apparatus and an encapsulating apparatus.
The OLED display device includes a plurality of pixel sub-regions in a pixel region. In each of the pixel sub-regions, a switching thin film transistor (TFT) and a driving TFT are formed. Generally, the TFTs are formed by using amorphous silicon as a semiconductor material.
Recently, to meet requirements of large size and high resolution, the OLED display device including the TFTs having faster signal process, more stable operation and durability is required. However, the TFT using amorphous silicon has a relatively low mobility, e.g., less than 1 cm2/Vsec, and there is a limitation for the large and high resolution OLED display device.
Accordingly, an oxide TFT including an active layer of an oxide semiconductor material, which has an excellent electrical property, e.g., mobility and off-current, can be used to obviate some of these shortcomings.
FIG. 1 is a cross-sectional view of an OLED display device according to related art. As shown in FIG. 1, an OLED display device 10 includes first and second substrates 20 and 56, a driving TFT Td and an emitting diode D on the first substrate 20, and a seal layer 54 covering an entire surface between the first and second substrates 20 and 56.
The first and second substrates 20 and 56, which face together and are separated from each other, include a plurality of pixel sub-regions in a pixel region. The first substrate 20 may be referred to as a lower substrate, a TFT substrate or a backplane. The second substrate 56 may be referred to as an incapsulation substrate.
A gate electrode 22 is formed on the first substrate 20, and a gate insulating layer 24 is formed on the gate electrode 22. An oxide semiconductor layer 26 corresponding to the gate electrode 22 is formed on the gate insulating layer 24, and an etch stopper 28 is formed on the oxide semiconductor layer 26. In addition, a source electrode 30 and a drain electrode 32 are formed at both ends of the etch stopper 28 and the oxide semiconductor layer 26.
The gate electrode 22, the oxide semiconductor layer 26, the source electrode 30 and the drain electrode 32 constitute the driving TFT Td.
A first passivation layer 34 is formed on the driving TFT Td, and a color filter layer 36 is formed on the first passivation layer 34 and in each of the pixel sub-regions.
A planarization layer 38 is formed on the color filter layer 36 to remove a step difference, and a first electrode 40 corresponding to the color filter layer 36 is formed on the planarization layer 38. A drain contact hole exposing the drain electrode 32 of the driving TFT Td is formed through the first passivation layer 34 and the planarization layer 38, and the first electrode 40 is connected to the drain electrode 32 through the drain contact hole.
A bank 44 covering edges of the first electrode 40 is formed on the first electrode 40. In other words, the bank 44 includes an opening such that a center of the first electrode 40 is exposed.
An emitting layer 46, which contacts the first electrode 40 through the opening of the bank 44, is formed on the bank 44, and a second electrode 48 is formed on the emitting layer 46.
The first electrode 40, the emitting layer 46 and the second electrode 48 constitute the emitting diode D.
In addition, a second passivation layer 52 is formed on the emitting diode D. The seal layer 54 is formed on an entire surface of the second passivation layer 52 and the second substrate 56 such that the first and second substrates 20 and 56 are attached together.
In the OLED display device according to related art, damage to the emitting diode D resulting from an impact of outer moisture and particles is prevented by the second passivation layer 52. As described above, the second passivation layer 52 is formed over an entire surface of the first substrate 20 and the second passivation layer 52 covers the pixel region.
The second passivation layer 52 is formed by a plasma chemical vapor deposition (PCVD) apparatus or a physical vapor deposition (PVD) apparatus such as a sputter. For example, the second passivation layer 52 may be a silicon nitride (SiNx) layer, a silicon oxide nitride (SiON) layer or a silicon oxide (SiOx) layer formed in the PCVD apparatus or an alumina (AlOx) layer formed in the sputter.
However, when the second passivation layer 52 is formed of silicon compound in the PCVD apparatus or the PVD apparatus, the deposition process should be performed under a low temperature (e.g., less than about 100° C.) to prevent thermal degradation of the emitting layer 46. Due to the low process temperature, source gases do not completely react and hydrogen (H) residues from the source gases such as silane (SiH4) gas or ammonia (NH3) gas are generated in the second passivation layer 52.
The hydrogen residues are diffused into the oxide semiconductor layer 26 of the driving TFT Td through the planarization layer 38 and the first passivation layer 34 thereby generating a reduction process of the oxide semiconductor material of the oxide semiconductor layer 26.
As a result of the reduction of the oxide semiconductor which causes a threshold voltage shift of the driving TFT Td, brightness differences in an image are generated and a displaying quality of the OLED display device is decreased.
In addition, excessive currents created by the threshold voltage shift of the driving TFT Td can cause thermal damage to the OLED display device when the OLED display device is operated over a long period of time.